A charge-pumping-loop concept for static MOS/RAM cells
- 1 June 1979
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 14 (3) , 599-603
- https://doi.org/10.1109/JSSC.1979.1051222
Abstract
A novel bistability concept based on a charge-pumping loop is presented. The loop consists of a charge pump and a simple two-device inverter. With an additional select transistor, the loop can be used as a static MOS/RAM cell. The proposed cell configurations are realized with only four devices, one or two shared supply lines, and an address-bit line pair. Feedback is accomplished with a single non-cross-coupled path. These cells can be manufactured with any industry-standard technology in a considerably smaller silicon area in comparison with the conventional flip-flop configuration. The standby power-dissipation level of the cells is also sufficiently low to meet the objectives of the high-density RAM design.Keywords
This publication has 4 references indexed in Scilit:
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- A 4096-bit high-speed emitter-coupled-logic (ECL) compatible random-access memoryIEEE Journal of Solid-State Circuits, 1975
- Charge pump random-access memoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1972
- Charge pumping in MOS devicesIEEE Transactions on Electron Devices, 1969