The Formation of Shallow Low-Resistance Source-Drain Regions for VLSI CMOS Technologies
- 1 February 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 20 (1) , 70-75
- https://doi.org/10.1109/jssc.1985.1052278
Abstract
No abstract availableThis publication has 6 references indexed in Scilit:
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