Design of a collision detection VLSI processor based on minimization of area-time products
- 27 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 4, 3691-3696
- https://doi.org/10.1109/robot.1998.681407
Abstract
No abstract availableKeywords
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- A proposed structure of a 4 Mbit content-addressable and sorting memoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1990