SYLON-DREAM: a multi-level network synthesizer
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
SYLON-DREAM, a logic network synthesizer which consists of SYLON-DREAM-INI for designing initial networks and SYLON-DREAM-MIN for further optimization, is presented. Unlike the networks designed by other approaches, those designed by SYLON-DREAM consist of MOS cells satisfying given constraints on the maximum number of series and parallel transistors. Such networks can be easily realized by a cell generator or mapped to the gates in existing cell libraries.Keywords
This publication has 9 references indexed in Scilit:
- A logic network synthesis system, SYLONPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- The transduction method-design of logic networks based on permissible functionsIEEE Transactions on Computers, 1989
- Design of MOS networks in single-rail input logic for incompletely specified functionsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
- SOCRATESPublished by Association for Computing Machinery (ACM) ,1986
- Global Flow Analysis in Automatic Logic DesignIEEE Transactions on Computers, 1986
- Automated Logic Design of Mos NetworksPublished by Springer Nature ,1985
- A Rule-Based System for Optimizing Combinational LogicIEEE Design & Test of Computers, 1985
- LSS: A system for production logic synthesisIBM Journal of Research and Development, 1984
- Logic Minimization Algorithms for VLSI SynthesisPublished by Springer Nature ,1984