Mechanisms Leading to Single Event Upset
- 1 January 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 33 (6) , 1577-1580
- https://doi.org/10.1109/tns.1986.4334644
Abstract
SRAM cell recovery time following a 140 MeV Krypton strike on a Sandia SRAM is modelled using a two-dimensional transient numerical simulator and circuit code. Strikes at both n- and p-channel "off" drains are investigated. Four principle results are obtained. The recovery time after a strike is strongly dependent on the drive of the restoring transistor. A struck "off" p-channel drain-to-gate capacitive coupling has a significant effect on recovery in SRAM with feedback resistors. Recovery time is approximately linear with LET over LET in the range to 0.4 pC/¿. Finally, an experimental n-channel SEU has been observed in a Sandia SRAM without feedback resistors.Keywords
This publication has 7 references indexed in Scilit:
- Memory SEU simulations using 2-D transport calculationsIEEE Electron Device Letters, 1985
- Comparison of 2D Memory SEU Transport Simulation with ExperimentsIEEE Transactions on Nuclear Science, 1985
- Single Event Upset Rate Estimates for a 16-K CMOS SRAMIEEE Transactions on Nuclear Science, 1985
- Comparison of Analytical Models and Experimental Results for Single Event Upset in CMOS SRAMsIEEE Transactions on Nuclear Science, 1983
- Collection of Charge on Junction Nodes from Ion TracksIEEE Transactions on Nuclear Science, 1982
- Charge Funneling in N- and P-Type Si SubstratesIEEE Transactions on Nuclear Science, 1982
- A field-funneling effect on the collection of alpha-particle-generated carriers in silicon devicesIEEE Electron Device Letters, 1981