Poly I/sup 2/L-a high-speed linear-compatible structure
- 1 August 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 12 (4) , 367-375
- https://doi.org/10.1109/jssc.1977.1050916
Abstract
Poly I/SUP 2/L a new bipolar process technology, is presented featuring 5 ns minimum propagation delay, 24 MHz flip-flop operation (using 10 /spl mu/ minimum feature size), and 15-30 V isolated and unconstrained linear circuit transistors on 5 /spl Omega/.cm epitaxy. Standard linear integrated circuit process complexity is increased by only one mask without extra diffusions.Keywords
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