A 64-tap CMOS echo canceller/decision feedback equalizer for 2B1Q HDSL transceivers
- 1 January 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal on Selected Areas in Communications
- Vol. 9 (6) , 839-847
- https://doi.org/10.1109/49.93094
Abstract
No abstract availableThis publication has 4 references indexed in Scilit:
- 2B1Q transceiver for the ISDN subscriber loopPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A transceiver for 800 kb/s full-duplex transmission over digital subscriber loops using a custom VLSI adaptive filter processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- An all pole IIR echo cancellerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Optimum Mean-Square Decision Feedback EqualizationBell System Technical Journal, 1973