Priority queue schedulers with approximate sorting in output-buffered switches
- 1 June 1999
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal on Selected Areas in Communications
- Vol. 17 (6) , 1127-1144
- https://doi.org/10.1109/49.772446
Abstract
All recently proposed packet-scheduling algorithms for output-buffered switches that support quality-of-service (QoS) transmit packets in some priority order, e.g., according to deadlines, virtual finishing times, eligibility times, or other time stamps that are associated with a packet. Since maintaining a sorted priority queue introduces significant overhead, much emphasis on QoS scheduler design is put on methods to simplify the task of maintaining a priority queue. In this paper, we consider an approach that attempts to approximate a sorted priority queue at an output-buffered switch. The goal is to trade off less accurate sorting for lower computational overhead. Specifically, this paper presents a scheduler that approximates the sorted queue of an earliest-deadline-first (EDF) scheduler. The approximate scheduler is implemented using a set of prioritized first-in/first-out (FIFO) queues that are periodically relabeled. The scheduler can be efficiently implemented with a fixed number of pointer manipulations, thus enabling an implementation in hardware. Necessary and sufficient conditions for the worst-case delays of the scheduler with approximate sorting are presented. Numerical examples, including traces based on MPEG video, demonstrate that in realistic scenarios, scheduling with approximate sorting is a viable optionKeywords
This publication has 35 references indexed in Scilit:
- Implementation strategies for scheduling algorithms in integrated-services packet-switched networksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A near-optimal packet scheduler for QoS networksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Statistical properties of MPEG video traffic and their impact on traffic modeling in ATM systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Efficient admission control of piecewise linear traffic envelopes at EDF schedulersIEEE/ACM Transactions on Networking, 1998
- Scalable architectures for integrated traffic shaping and link scheduling in high-speed ATM switchesIEEE Journal on Selected Areas in Communications, 1997
- Deterministic delay bounds for VBR video in packet-switching networks: fundamental limits and practical trade-offsIEEE/ACM Transactions on Networking, 1996
- Efficient fair queuing using deficit round-robinIEEE/ACM Transactions on Networking, 1996
- A generalized processor sharing approach to flow control in integrated services networks: the single-node caseIEEE/ACM Transactions on Networking, 1993
- A calculus for network delay. I. Network elements in isolationIEEE Transactions on Information Theory, 1991
- A scheme for real-time channel establishment in wide-area networksIEEE Journal on Selected Areas in Communications, 1990