A low-power PLA for a signal processor
- 1 January 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 26 (2) , 107-115
- https://doi.org/10.1109/4.68124
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- FFT scaling in Domino CMOS gatesIEEE Journal of Solid-State Circuits, 1985
- A study in the use of PLA-based macrosIEEE Journal of Solid-State Circuits, 1979
- High-speed static programmable logic array in LOCMOSIEEE Journal of Solid-State Circuits, 1976