A 0.1/spl mu/A standby current, bouncing-noise-immune 1Mb SRAM
- 1 January 1988
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 3 references indexed in Scilit:
- A 34ns 1Mb CMOS SRAM using triple polyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A 25ns 1Mb CMOS SRAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1987
- A 35ns 1Mb CMOS SRAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1987