Avalanche Multiplication in Silicon Junctions†
- 1 December 1962
- journal article
- electronics section
- Published by Taylor & Francis in Journal of Electronics and Control
- Vol. 13 (6) , 537-544
- https://doi.org/10.1080/00207216208937461
Abstract
The multiplication of carriers generated in the space-charge layer of reverse biased silicon pn step junctions has been calculated in terms of the multiplication of electrons and holes injected into the junction. Curves are plotted for p+n and n+p junctions, and good agreement has been found with experimental curves.Keywords
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