An integrated high resolution CMOS timing generator based on an array of delay locked loops
- 1 July 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 31 (7) , 952-957
- https://doi.org/10.1109/4.508208
Abstract
No abstract availableThis publication has 11 references indexed in Scilit:
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