Channel Shortening in MOS Transistors during Junction Walk-Out
- 15 October 1971
- journal article
- research article
- Published by AIP Publishing in Applied Physics Letters
- Vol. 19 (8) , 287-289
- https://doi.org/10.1063/1.1653921
Abstract
The walk‐out of the breakdown voltage of the junctions of p‐channel MOS transistors was found to be accompanied by an increase in the transconductance. An explanation for this relationship is offered here in terms of electron injection into the gate oxide near the junctions, and subsequent trapping there. The rate of junction walk‐out depends not only on the total injected negative charge, but also on the value of the injection current itself, increasing at higher injection currents. The ratio of the injection current to the total junction current is found to decrease with increasing breakdown voltage.Keywords
This publication has 4 references indexed in Scilit:
- Electron gate currents and threshold stability in the n-channel stacked gate MOS tetrodeIEEE Transactions on Electron Devices, 1971
- Avalanche Injection of Electrons into Insulating SiO2 Using MOS StructuresJournal of Applied Physics, 1970
- A new MNOS charge storage effectSolid-State Electronics, 1969
- AVALANCHE INJECTION CURRENTS AND CHARGING PHENOMENA IN THERMAL SiO2Applied Physics Letters, 1969