PEWs: a decentralized dynamic scheduler for ILP processing
- 24 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 1, 239-246
- https://doi.org/10.1109/icpp.1996.537165
Abstract
No abstract availableKeywords
This publication has 9 references indexed in Scilit:
- An Out-of-order Superscalar Processor With Speculative Execution And Fast, Precise InterruptsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Misc: A Multiple Instruction Stream ComputerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Improving CISC instruction decoding performance using a fill unitPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1995
- The Metaflow architectureIEEE Micro, 1991
- Hardware Support For Large Atomic Units in Dynamically Scheduled MachinesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- Instruction issue logic for high-performance, interruptable pipelined processorsPublished by Association for Computing Machinery (ACM) ,1987
- Critical issues regarding HPS, a high performance microarchitecturePublished by Association for Computing Machinery (ACM) ,1985
- Decoupled access/execute computer architecturesACM SIGARCH Computer Architecture News, 1982
- An Efficient Algorithm for Exploiting Multiple Arithmetic UnitsIBM Journal of Research and Development, 1967