A memory system based on surface-charge transport

Abstract
The surface-charge transistor (SCT) is an integrated-circuit element and involves a new concept for controlling the transfer of stored electrical charge along the surface of a semiconductor. The experimental transient response of a large-geometry SCT is presented. Linear high-density arrays of surface-charge transistors may be utilized to form digital or analog shift registers. The experimental performance of a 14-bit shift register, which has been operated in both these modes, is given. By forming these units in a serpentine fashion, charge (information) may be transported back and forth between refresh circuits to form an array of cells. An experimental circuit of this type is presented. Using these techniques a digital serial memory of high density may be constructed. Using standard metalization linewidths and tolerances a cell size of 2 mil/SUP 2/ per bit is shown to be feasible.

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