Concurrent test scheduling in built-in self-test environment
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- TEST SCHEDULING IN TESTABLE VLSI CIRCUITSPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Graph partitioning for concurrent test scheduling in VLSI circuitPublished by Association for Computing Machinery (ACM) ,1991
- Test scheduling and control for VLSI built-in self-testIEEE Transactions on Computers, 1988
- Test Schedules for VLSI Circuits Having Built-In Test HardwareIEEE Transactions on Computers, 1986