Binary Decision Diagrams
- 1 June 1978
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-27 (6) , 509-516
- https://doi.org/10.1109/tc.1978.1675141
Abstract
This paper describes a method for defining, analyzing, testing, and implementing large digital functions by means of a binary decision diagram. This diagram provides a complete, concise, "implementation-free" description of the digital functions involved. Methods are described for deriving these diagrams and examples are given for a number of basic combinational and sequential devices. Techniques are then outlined for using the diagrams to analyze the functions involved, for test generation, and for obtaining various implementations. It is shown that the diagrams are especially suited for processing by a computer. Finally, methods are described for introducing inversion and for directly "interconnecting" diagrams to define still larger functions. An example of the carry look-ahead adder is included.Keywords
This publication has 3 references indexed in Scilit:
- Complete Test Sets for Logic FunctionsIEEE Transactions on Computers, 1973
- Universal Test Sets for Logic NetworksIEEE Transactions on Computers, 1973
- On Finding a Nearly Minimal Set of Fault Detection Tests for Combinational Logic NetsIEEE Transactions on Electronic Computers, 1966