A Logic Nanotechnology Featuring Strained-Silicon
Top Cited Papers
- 30 March 2004
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 25 (4) , 191-193
- https://doi.org/10.1109/led.2004.825195
Abstract
Strained-silicon (Si) is incorporated into a leading edge 90-nm logic technology . Strained-Si increases saturated n-type and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) drive currents by 10 and 25%, respectively. The process flow consists of selective epitaxial Si/sub 1-x/Ge/sub x/ in the source/drain regions to create longitudinal uniaxial compressive strain in the p-type MOSFET. A tensile Si nitride-capping layer is used to introduce tensile uniaxial strain into the n-type MOSFET and enhance electron mobility. Unlike past strained-Si work: 1) the amount of strain for the n-type and p-type MOSFET can be controlled independently on the same wafer and 2) the hole mobility enhancement in this letter is present at large vertical electric fields, thus, making this flow useful for nanoscale transistors in advanced logic technologies.Keywords
This publication has 12 references indexed in Scilit:
- Hole mobility enhancements in nanometer-scale strained-silicon heterostructures grown on Ge-rich relaxed Si1−xGexJournal of Applied Physics, 2003
- Six-band k⋅p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thicknessJournal of Applied Physics, 2003
- Strained silicon MOSFET technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Performance-augmented CMOS using back-end uniaxial strainPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Silicide induced pattern density and orientation dependent transconductance in MOS transistorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Local mechanical-stress control (LMC): a new technique for CMOS-performance enhancementPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Subband structure and mobility of two-dimensional holes in strained Si/SiGe MOSFET’sPhysical Review B, 1998
- Origin of the Linear and Nonlinear Piezoresistance Effects in p-Type SiliconJapanese Journal of Applied Physics, 1984
- Piezoresistance in Quantized Conduction Bands in Silicon Inversion LayersJournal of Applied Physics, 1971