Implementation of a Viterbi Processor for a Digital Communications System with a Time-Dispersive Channel
- 1 January 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal on Selected Areas in Communications
- Vol. 4 (1) , 160-167
- https://doi.org/10.1109/jsac.1986.1146284
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- An Adaptive Maximum Likelihood Sequence Estimation Technique for Wideband HF CommunicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- Minimum propagation delays in VLSIIEEE Journal of Solid-State Circuits, 1982
- A synchronous approach for clocking VLSI systemsIEEE Journal of Solid-State Circuits, 1982
- Microprocessor based implementation and testing of a simple Viterbi detectorCanadian Electrical Engineering Journal, 1981
- The Viterbi algorithm applied to digital data transmissionCommunications Society, 1975
- Adaptive Maximum-Likelihood Receiver for Carrier-Modulated Data-Transmission SystemsIEEE Transactions on Communications, 1974
- The viterbi algorithmProceedings of the IEEE, 1973