Influence of scribe lane structures on wafer potentials and charging damage

Publisher Website

7 November 2002

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 26-28
https://doi.org/10.1109/ppid.2000.870578

Abstract

No abstract available

Keywords

This publication has 2 references indexed in Scilit:

Quantifying Wafer Charging During Via Etch
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2005
Charge Damage Caused by Electron Shading Effect
Japanese Journal of Applied Physics, 1994