The design and performance of CMOS 256K bit DRAM devices
- 1 October 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (5) , 610-618
- https://doi.org/10.1109/jssc.1984.1052197
Abstract
No abstract availableKeywords
This publication has 8 references indexed in Scilit:
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- HMOS III technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1982
- Characterization of reverse-bias leakage currents and their effect on the holding time characteristics of MOS dynamic RAM circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1977