Prediction of error probabilities for integrated digital synchronizers
- 1 April 1984
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 19 (2) , 236-244
- https://doi.org/10.1109/jssc.1984.1052123
Abstract
No abstract availableKeywords
This publication has 5 references indexed in Scilit:
- Flip-flop resolving time test circuitIEEE Journal of Solid-State Circuits, 1982
- The behaviour of flip-flops used as synchronizers and prediction of their failure rateIEEE Journal of Solid-State Circuits, 1980
- Algorithms for ASTAP--A network-analysis programIEEE Transactions on Circuit Theory, 1973
- Anomalous Behavior of Synchronizer and Arbiter CircuitsIEEE Transactions on Computers, 1973
- Time Loss Through Gating of Asynchronous Logic Signal PulsesIEEE Transactions on Electronic Computers, 1966