CASCH-a scheduling algorithm for 'high level'-synthesis
- 9 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 311-315
- https://doi.org/10.1109/edac.1991.206414
Abstract
It is the goal of the recently developed and herewith presented scheduling algorithm to optimize the timing behaviour within automated circuit synthesis. The algorithm is a part of the CADDY-Synthesis-System (CAddy SCHeduling). Basis is a list scheduling algorithm which is controlled by a heuristic rating function. The allocated resources can be modelled in a flexible and detailed manner in order to specify component types for several different operations as well as different component types for the same operation. It is a special feature of this scheduling algorithm that the assignment of operations to component types is decided during the scheduling.Keywords
This publication has 6 references indexed in Scilit:
- ASIC design using the high-level synthesis system CALLAS: a case studyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- System synthesis using behavioural descriptionsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Synthesizing circuits from behavioural descriptionsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- Scheduling and binding algorithms for high-level synthesisPublished by Association for Computing Machinery (ACM) ,1989
- Sehwa: A program for synthesis of pipelinesPublished by Association for Computing Machinery (ACM) ,1988
- Force-directed scheduling in automatic data path synthesisPublished by Association for Computing Machinery (ACM) ,1987