Cache designs with partial address matching
- 24 August 2005
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
One critical aspect in designing set-associative cache at high clock rate is deriving timely results from directory lookup. In this paper we investigate the possibility of accurately approximating the results of conventional directory search with faster matches of few partial address bits. Such fast and accurate approximations may be utilized to optimize cache access timing, particularly in a customized design environment. Through analytic and simulation studies we examine the trade-offs of various design choices. We also discuss few other applications of partial address matching to computer designs.Keywords
This publication has 12 references indexed in Scilit:
- Performance tradeoffs in cache designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Early resolution of address translation in cache designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Partial address directory for cache accessIEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1994
- An analytical access time model for on-chip cache memoriesIEEE Journal of Solid-State Circuits, 1992
- A case for direct-mapped cachesComputer, 1988
- Cache design of a sub-micron CMOS system/370Published by Association for Computing Machinery (ACM) ,1987
- The IBM 3090 system: An overviewIBM Systems Journal, 1986
- Using cache memory to reduce processor-memory trafficPublished by Association for Computing Machinery (ACM) ,1983
- Cache MemoriesACM Computing Surveys, 1982
- Characterizing the Storage Process and Its Effect on the Update of Main Memory by Write ThroughJournal of the ACM, 1979