An SOI CMOS, High Gain and Low Noise TransimpedanceLimiting Amplifier for 10Gb/s Applications
- 21 July 2006
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper presents a low noise, high gain transimpedance-limiting amplifier (TIALA) design for 10Gb/s applications, implemented in a 0.13mum SOI CMOS technology. Powered from a single 1.5V supply and consuming 165mW, the TIALA features auto-zero DC feedback and has 25muApp input current sensitivity (an estimated -16dBm optical sensitivity) with over 40dB electrical dynamic range and 14 kOhm linear gainKeywords
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