A design of programmable logic arrays with universal tests
- 1 November 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems
- Vol. 28 (11) , 1027-1032
- https://doi.org/10.1109/tcs.1981.1084932
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- Multiple Fault Detection in Programmable Logic ArraysIEEE Transactions on Computers, 1980
- Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's)IEEE Transactions on Computers, 1979
- Recent Developments in the Theory and Practice of Testable Logic Design*Computer, 1976
- Fault Detecting Test Sets for Reed-Muller Canonic NetworksIEEE Transactions on Computers, 1975
- An Introduction to Array LogicIBM Journal of Research and Development, 1975
- Enhancing Testability of Large-Scale Integrated Circuits via Test Points and Additional LogicIEEE Transactions on Computers, 1973
- Easily Testable Realizations ror Logic FunctionsIEEE Transactions on Computers, 1972