Solid State Gated Integrator

Abstract
A simple, inexpensive, two‐channel gated (``boxcar'') integrator circuit using solid state components is described. Features of the circuit include a wide range of usable gate widths (from 0.2 μsec to arbitrarily large), a wide range of learning times (0.05 μsec to 1 sec), a high ratio of holding to learning time (as high as 4×107 for 1% output voltage sag), linearity of about 0.3% over a range of ±8 V at the output, temperature stability of about 3.5 mV/C° at the output, and a long term drift of about 0.5 mV/h at the output.

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