Combined topological and functionality-based delay estimation using a layout-driven approach for high-level applications
- 1 January 1994
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 13 (12) , 1450-1460
- https://doi.org/10.1109/43.331402
Abstract
No abstract availableKeywords
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