Verifying properties using sequential ATPG [IC design]
- 25 June 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 7 references indexed in Scilit:
- The BACK algorithm for sequential test generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- ATPG in practical and non-traditional applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- An analysis of ATPG and SAT algorithms for formal verificationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Practical use of sequential ATPG for model checking: going the extra mile does pay offPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Benefits of Bounded Model Checking at an Industrial SettingPublished by Springer Nature ,2001
- Automatic verification of finite-state concurrent systems using temporal logic specificationsACM Transactions on Programming Languages and Systems, 1986
- Proving the Correctness of Multiprocess ProgramsIEEE Transactions on Software Engineering, 1977