Distributed syndrome decoding for regular interconnected structures
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Distributed syndrome decoding algorithms to locate faulty PEs (processing elements) in large-scale regular interconnected structures based on the concepts of system-level diagnosis are developed. These algorithms operate in a systolic manner to locate the faulty processors. The computational complexities of these algorithms are either linear or sublinear, depending on the architecture of the system. Their implementation complexities and diagnosis capabilites differ substantially. The conditions that a fault pattern should satisfy for correct and complete diagnosis and the maximum global size of fault sets which can be diagnosed successfully using these algorithms are also identified.<>Keywords
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