Electrical and optical clock distribution networks for gigascale microprocessors
- 1 October 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 10 (5) , 582-594
- https://doi.org/10.1109/tvlsi.2002.801604
Abstract
A summary of electrical and optical approaches to clock distribution within high-performance microprocessors is presented. System-level properties of intrachip electrical clock distribution networks corresponding to three microprocessor families are summarized. It is found that global clock interconnect performance and short-term jitter present the greatest challenges to the continued use of conventional clock distribution methodologies. An extrapolation of trends describing the percentage of clock period consumed by global skew and short-term jitter identifies the 32-nm technology generation of the 2002 International Technology Roadmap for Semiconductors (ITRS) as the first technology generation within which alternate methods of clock distribution may be warranted. Research efforts investigating interboard through intrachip optical clock distribution are also summarized. An optical distribution network compatible with high volume manufacturing in conjunction with a suitable means of providing optical-to-electrical signal conversion comprise the two fundamental challenges facing successful implementation of an optical clock distribution network. It is found that a global guided-wave distribution capable of efficient input and output coupling of optical power is required to meet the first challenge. The identification of a suitable means of optical-to-electrical conversion, however, remains an active topic of research.Keywords
This publication has 60 references indexed in Scilit:
- A 1 GHz single-issue 64 b PowerPC processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A low-jitter PLL clock generator for microprocessors with lock range of 340-612 MHzIEEE Journal of Solid-State Circuits, 1999
- A phase-locked loop clock generator for a 1 GHz microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1998
- Clock Distribution Methodology for PowerPC™ MicroprocessorsPublished by Springer Nature ,1997
- Optical Clock Distribution in Electronic SystemsPublished by Springer Nature ,1997
- Circuit Placement, Chip Optimization, and Wire Routing for IBM IC TechnologyJournal of Signal Processing Systems, 1997
- Alignment issues in packaging for free-space optical interconnectsOptical Engineering, 1994
- Optical clock distribution using integrated free-space opticsOptics Communications, 1992
- Timing Uncertainty For Receivers In Optical Clock Distribution For VLSIOptical Engineering, 1988
- Optical interconnections for VLSI systemsProceedings of the IEEE, 1984