Power estimation tool for sub-micron CMOS VLSI circuits
- 1 January 1992
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Accurate and fast time-domain current waveform simulation is important for the design of reliable CMOS VLSI circuits. A detailed current model that resulted in a maximum of 10% deviation from the current waveforms as obtained by SPICE LEVEL 3 at peak values and 5% at the average current is presented. The current model accounts for short-channel effects, input risetimes, short-circuit and dynamic current, and circuit topology. Moreover, the model produces piecewise linear current waveforms and can be incorporated in any switch-level simulator. Using the models in an event driven simulator, a 3-4 orders of magnitude speedup relative to SPICE LEVEL 3 has been achieved. The results for current waveform accuracy are better than those obtained for previously published methods and in particular for complex CMOS circuits.Keywords
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