Performance trends in high-end processors

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Abstract
Based on a first order cycle time model performance trends and limits are projected for both bipolar and CMOS processors. The key in identifying trends is the understanding of the pivotal factors at any given stage of technology progression. One such parameter is the physical area of the processor. In coming technologies there will be opposite demands placed on the system's area stemming from a need to reduce the proportion of interconnection capacitance and to send signals across the processor. Contrary to the usual perception, delays resulting from wiring capacitance decrease if processor area increases, while the minimization of signal travel times favors reducing area. The system size tradeoff in the case of bipolar processors is primarily determined by power density, while CMOS processor sizes are determined by wirability requirements. To achieve the full potential of CMOS, interconnections will have to be carefully planned. The performance limits of bipolar and room temperature CMOS uniprocessors are shown to be very similar. The highest performance technology on the horizon is liquid nitrogen temperature CMOS. Alternate technologies, based on III-V compound devices, or more exotic quantum structures, are not expected to play a role in future general-purpose high-end systems.

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