Limitations of the MOS capacitance method for the determination of semiconductor surface properties

Abstract
For the use of the MOS capacitance method in the study of surface properties, various approximations and assumptions, of a purely conceptual and of an experimental nature, are usually made. These are not always justified. In this paper the applicability of this capacitance method for surface studies is examined critically. It is shown that this method is limited in its applicability and accuracy, and that, in most cases, it yields only the gross features of the surface states. If there are traps distributed spatially throughout the oxide, only an effective surface state distribution can be found, and this effective distribution may be interpreted ambiguously as due either to traps right at the interface, throughout the oxide, or both. Because the MOS capacitance consists essentially of the oxide capacitance in series with the semiconductor capacitances there is a practical lower limit on the magnitude of the semiconductor capacitance which can be measured. Together with difficulties in interpreting measurements in the inversion layer regime, this leads to a restriction on that portion of the forbidden gap in which states may be investigated. MOS capacitors, produced by thermal oxidation of silicon in either wet or dry oxygen, were examined by this method. It was found that, within experimental accuracy, and within the range of surface potential that can be covered by these measurements, the total number of occupied traps usually varies linearly with surface potential if it is assumed that all the traps are located right at the interface. However, these results can also be explained if it is assumed that the oxide contains a high density of low lying trap sites which are essentially uniformly distributed spatially throughout the oxide. In some specimens a monoenergetic trap level 0.7 eV below the conduction band and located at the interface was found.

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