A new methodology for the design centering of IC fabrication processes
- 7 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A practical methodology that can be applied to optimize the process yield of IC fabrication lines is described. The yield maximization problem is first reformulated into a deterministic design centering problem. Macromodeling and problem decomposition are then applied to solve the design centering problem efficiently. The effectiveness of this methodology is illustrated through a simulation example involving a CMOS process adopted from an industrial line.Keywords
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