An easy-to-use mismatch model for the MOS transistor
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- 7 August 2002
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 37 (8) , 1056-1064
- https://doi.org/10.1109/jssc.2002.800953
Abstract
In this paper, a physics-based mismatch model is presented. It is demonstrated on a 0.18-/spl mu/m technology that a simple mismatch model can still be used to characterize deep-submicron technologies. The accuracy of the model is examined and found to be within 20% in the strong inversion region. Bulk bias dependence is modeled in a physical way. To extract the mismatch parameters, a weighted fit is introduced. It is shown that the width and length dependence of the mismatch parameters is given by the Pelgrom model.Keywords
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