An ECL 5000-gate gate array with 190-ps gate delay

This publication has 4 references indexed in Scilit:

• A 10K-Gate CMOS Gate Array Based on a Gate Isolation Structure
  IEEE Journal of Solid-State Circuits, 1985
• A subnanosecond 2000 gate array with ECL 100K compatibility
  IEEE Transactions on Electron Devices, 1984
• A bipolar 2500-gate subnanosecond masterslice LSI
  IEEE Journal of Solid-State Circuits, 1981
• High speed bipolar process with full ion implantation and self-aligned contact structure
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1978