Geometry optimization of TMR current sensors for on-chip IC testing
- 17 October 2005
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Magnetics
- Vol. 41 (10) , 3685-3687
- https://doi.org/10.1109/tmag.2005.854813
Abstract
In this paper, we demonstrate that tunnel magnetoresistive (TMR) elements can be used as sensitive on-chip current sensors in the microampere to milliampere range for current-based IC testing such as power-pin testing and quiescent I/sub dd/ current (IDDQ) testing. The sensor can be integrated in CMOS ICs containing magnetic random access memory. TMR current sensors with various lateral dimensions (from submicrometer to micrometer) arranged in a Wheatstone bridge have been realized and analyzed. A typical sensitivity of 2.5(mV/V)/mA and a current resolution of 5.5/spl mu/A have been observed. The influence of the sensor geometry on sensor sensitivity, hysteresis, and temperature rise due to Joule heating has been investigated.Keywords
This publication has 5 references indexed in Scilit:
- Spectrum-based BIST in complex SOCsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Magnetoresistive random access memory using magnetic tunnel junctionsProceedings of the IEEE, 2003
- Power pin testing: making the test coverage completePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Iddq testing for CMOS VLSIProceedings of the IEEE, 2000
- Picotesla field sensor design using spin-dependent tunneling devicesJournal of Applied Physics, 1998