Spatial retardation of carrier heating in scaled 0.1-μm n-MOSFET's using Monte Carlo simulations

This publication has 14 references indexed in Scilit:

• Two-stage hot-carrier degradation and its impact on submicron LDD NMOSFET lifetime prediction
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Understanding hot-electron transport in silicon devices: Is there a shortcut?
  Journal of Applied Physics, 1995
• Effects of hot carrier induced interface state generation in submicron LDD MOSFET's
  IEEE Transactions on Electron Devices, 1994
• High-performance devices for a 0.15- mu m CMOS technology
  IEEE Electron Device Letters, 1993
• Lateral profiling of oxide charge and interface traps near MOSFET junctions
  IEEE Transactions on Electron Devices, 1993
• AC versus DC hot-carrier degradation in n-channel MOSFETs
  IEEE Transactions on Electron Devices, 1993
• Monte Carlo simulation of deep-submicron SOI and conventional nMOSFET hot-electron-induced degradation
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1993
• Modeling hot-electron gate current in Si MOSFET's using a coupled drift-diffusion and Monte Carlo method
  IEEE Transactions on Electron Devices, 1992
• Interface state generation mechanism in n-MOSFET's
  Solid-State Electronics, 1989
• Monte Carlo calculations on hot electron energy tails
  Applied Physics Letters, 1977