Fault tolerance in VLSI circuits
- 1 July 1990
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in Computer
- Vol. 23 (7) , 73-83
- https://doi.org/10.1109/2.56854
Abstract
The defects that can occur when manufacturing VLSI ICs and the faults that can result are described. Some commonly used restructuring techniques for avoiding defective components are discussed. Several defect-tolerant designs of memory ICs, logic ICs, and wafer-scale circuits are presented. Yield models for predicting the yield of chips with redundancy are introduced, and the optimal amount of redundancy is determined.Keywords
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