An embedded 240-mW 10-b 50-MS/s CMOS ADC in 1-mm/sup 2/
- 1 January 1997
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 32 (12) , 1887-1895
- https://doi.org/10.1109/4.643647
Abstract
No abstract availableKeywords
This publication has 25 references indexed in Scilit:
- A 14-bit 10-MHz calibration-free CMOS pipelined A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 16b ΣΔ pipeline ADC with 2.5 MHz output data-ratePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 15 b 5 MSample/s low-spurious CMOS ADCPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- 12b 50MSample/s two-stage A/D converterPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A 10-b, 100-MS/s CMOS A/D converterIEEE Journal of Solid-State Circuits, 1997
- A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiersIEEE Journal of Solid-State Circuits, 1997
- A 13-b 10-Msample/s ADC digitally calibrated with oversampling delta-sigma converterIEEE Journal of Solid-State Circuits, 1995
- An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADCIEEE Journal of Solid-State Circuits, 1995
- A 10-b 100-Msample/s pipelined subranging BiCMOS ADCIEEE Journal of Solid-State Circuits, 1993
- A 10 b 50 MHz pipelined CMOS A/D converter with S/HIEEE Journal of Solid-State Circuits, 1993