Sub-0.1 μm gate etch processes: Towards some limitations of the plasma technology?

Gate structures with dimensions smaller than 0.1 μm on gate oxides thinner than 2 nm have been patterned in a high density plasma helicon source. The chemistry which seems best adapted uses an ${\mathrm{HBr/O}}_2$ mixture ensuring high selectivity to the gate oxide and an etch anisotropy allowing the critical dimension control in the 0.1 μm regime to be acceptable. Kinetic ellipsometry has been used to measure silicon and ${\mathrm{SiO}}_2$ etch rates and carefully control the process in real time. X-ray photoelectron spectroscopy (XPS) studies have been performed to determine the chemical topography of ${\mathrm{SiO}}_2$ masked gate stacks with different aspect ratios. In particular, the chemical composition and thickness of the sidewall passivation layer have been determined. We have also observed an unsuspected behavior of thin gate oxides during the overetch step of the process. By combining XPS and spectroscopic ellipsometry, we have attributed this behavior to reactive species penetration through the thin gate oxide. This phenomenon could play an important role in the sub 0.1 μm complementary metal-oxide-semiconductors process optimization.