On efficient concurrent fault simulation for synchronous sequential circuits
- 2 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 10 references indexed in Scilit:
- A sequential circuit fault simulation by surrogate fault propagationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Critical path tracing in sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- On efficient concurrent fault simulation for synchronous sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A new test generation method for sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- PROOFS: a fast, memory efficient sequential circuit fault simulatorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- On computing the sizes of detected delay faultsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1990
- Differential fault simulation - a fast method using minimal memoryPublished by Association for Computing Machinery (ACM) ,1989
- The concurrent simulation of nearly identical digital networksPublished by Association for Computing Machinery (ACM) ,1988
- A Deductive Method for Simulating Faults in Logic CircuitsIEEE Transactions on Computers, 1972
- On an Improved Diagnosis ProgramIEEE Transactions on Electronic Computers, 1965