A 14 ns 256 K*1 CMOS SRAM with multiple test modes
- 1 January 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 24 (4) , 874-880
- https://doi.org/10.1109/4.34064
Abstract
No abstract availableThis publication has 6 references indexed in Scilit:
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