Zero defects or zero stuck-at faults-CMOS IC process improvement with I/sub DDQ/
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 6 references indexed in Scilit:
- CMOS IC stuck-open-fault electrical effects and design considerationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Electrical properties and detection methods for CMOS IC defectsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Test generation for current testingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- On the charge sharing problem in CMOS stuck-open fault testingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Quiescent power supply current measurement for CMOS IC defect detectionIEEE Transactions on Industrial Electronics, 1989
- Testing for Bridging Faults (Shorts) in CMOS CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1983