Bump heat sink technology - A novel assembly technology suitable for power HBTs

Abstract
A novel assembly technique, bump heat sink (BHS), suitable for compound semiconductor power HBTs is proposed and demonstrated. In this technique, the heat generated in the transistor junction is effectively conducted away through a gold bump which is located on the top of each transistor unit. Using this technique, power transistors are demonstrated with power added efficiencies /spl eta//sub add/ of 74%, 66% and 61% for 5.0 W, 8.0 W and 10.0 W output CW, respectively, at 0.9 GHz with V/sub cc/=6 V. A three-stage HBT MMIC power amplifier for GSM class 4 is also demonstrated with /spl eta//sub add/ >55% at V/sub cc/=4 V CW operation.

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