Dynamic state and objective learning for sequential circuit automatic test generation using recomposition equivalence

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Abstract
Automatic test pattern generation (ATPG) for sequential circuits involves making decisions in the state and combinational search spaces defined by a sequential circuit. The search spaces are exponential in the memory elements and primary inputs, respectively, making exhaustive search impractical. Since the circuit topology does not change, ATPG search for different faults may share identical decision spaces. However, existing sequential circuit ATPG algorithms are not capable of recognizing identical search decision spaces. Consequently, they reenter previously-explored decision spaces. We propose a dynamic learning algorithm that identifies previously-explored decision spaces during reverse-time sequential circuit test generation based on decomposition equivalences. This algorithm runs two and 3.3 times faster than GENTEST and HITEC, respectively, on the 1989 ISCAS benchmarks, compresses 24% of the learned information and identifies 85% of all previously-explored decision spaces by state covering. We provide theorems with proofs, examples and results.

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