Test generation for sequential circuits

This publication has 11 references indexed in Scilit:

• MIS: A Multiple-Level Logic Optimization System
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• A topological search algorithm for ATPG
  Published by Association for Computing Machinery (ACM) ,1987
• Design Decisions in SPUR
  Computer, 1986
• Test generation by activation and defect-drive (TEGAD)
  Integration, 1985
• RTG: Automatic Register Level Test Generator
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1985
• An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
  IEEE Transactions on Computers, 1981
• Diagnosis & Reliable Design of Digital Systems
  Published by Springer Nature ,1976
• The Weighted Random Test-Pattern Generator
  IEEE Transactions on Computers, 1975
• A Random and an Algorithmic Technique for Fault Detection Test Generation for Sequential Circuits
  IEEE Transactions on Computers, 1971
• Algorithms for Detection of Faults in Logic Circuits
  IEEE Transactions on Computers, 1971