Retiming sequential circuits for low power
- 30 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- Estimation of average switching activity in combinational and sequential circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Low-power CMOS digital designIEEE Journal of Solid-State Circuits, 1992
- On average power dissipation and random pattern testability of CMOS combinational logic networksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1992
- Transition density, a stochastic measure of activity in digital circuitsPublished by Association for Computing Machinery (ACM) ,1991
- Synchronous logic synthesis: algorithms for cycle-time minimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1991