Analysis of ac Surface Photovoltages in a Depleted Oxidized p-Type Silicon Wafer

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Abstract
The majority carrier conductance due to the hole flow towards the surface of a wafer from the bulk has been formulated following the half-sided junction model previously reported. An empirical equation for the carrier drift velocities in very high electric fields has been proposed for the formulation. Besides the conductance, the depletion layer capacitance, interface trap capacitance and conductance are found to be responsible for ac surface photovoltages in the depletion case. The majority carrier conductance can explain the formerly observed conductance of 27 S/m2 in a 76-mm-diameter 1.0-mΩm oxidized p-type Si wafer. Analysis of the formerly reported surface photovoltages reveals a surface potential, fixed oxide charge density, hole capture cross section and interface trap density of 0.32 V, 1.7 mC/m2, 2.0×10-20 m2 and 2.0×1016 m-2 eV1 respectively.